DS90CR286AMTD/NOPB

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Details for Texas Instruments

DS90CR286AMTD/NOPB

+3.3V Rising Edge Data Strobe LVDS Receiver 28-Bit Channel Link - 66 MHz
Buy Directly from Texas Instruments (6367 in Stock)
$3.9800 per unit
Series Information for DS90CR286AMTD/NOPB - Texas Instruments

Features

  • feature
    20 to 66 MHz Shift Clock Support
  • feature
    50% Duty Cycle on Receiver Output Clock
  • feature
    Automotive Q Grade Available - AEC-Q100 Grade
  • feature
    Bestu2013inu2013Class Set and Hold Times on Rx Outputs
  • feature
    Compatible with TIA/EIA-644 LVDS Standard
  • feature
    ESD Rating > 7 kV (HBM), > 700 V (EIAJ)
  • feature
    Low Profile 56-Pin or 48-Pin DGG (TSSOP) Package
  • feature
    Operating Temperature: u221240u00b0C to 85u00b0C
  • feature
    PLL Requires No External Components
  • feature
    Rx Power Consumption < 270 mW (Typ) at 66 MHz Worst Case
  • feature
    Rx Power-Down Mode < 200 u03bcW (Max)

Description

LVDS RECEIVER TSSOP-56
The DS90CR286A receiver converts the four LVDS data streams back into parallel 28 bits of LVCMOS data. Also available is the DS90CR216A receiver that converts the three LVDS data streams back into parallel 21 bits of LVCMOS data. The outputs of both receivers strobe on the rising edge. The receiver LVDS clock operates at rates from 20 to 66 MHz. The device phase-locks to the input clock, samples the serial bit streams at the LVDS data lines, and converts them into parallel output data. At an incoming clock rate of 66 MHz, each LVDS input line is running at a bit rate of 462 Mbps, resulting in a maximum throughput of 1.848 Gbps for the DS90CR286A and 1.386 Gbps for the DS90CR216A. The DS90CR286A and DS90CR216A devices are enhanced over prior generation receivers and provide a wider data valid time on the receiver output. The use of these serial link devices is ideal for solving EMI and cable size problems associated with transmitting data over wide, high speed parallel LVCMOS interfaces. Both devices are offered in TSSOP packages.

Specifications

Device Type:
LVDS Receiver
Peak-to-Peak Jitter Max:
250ps
Supply Current Max:
105mA
Operating Temperature Min:
-40°C
Operating Temperature Max:
85°C
Supply Voltage Min:
3V
Supply Voltage Max:
3.6V
ESD HBM:
7kV

Alternate Descriptions

Avnet America

LVDS Receiver 56-Pin TSSOP Rail

Avnet America product

Avnet Europe

LVDS Receiver 56-Pin TSSOP Rail

Avnet Europe product

Texas Instruments

+3.3V Rising Edge Data Strobe LVDS Receiver 28-Bit Channel Link - 66 MHz

Texas Instruments product