ATSAMA5D41B-CUR Part Information
Details for ATSAMA5D41B-CUR by Microchip Technology
ATSAMA5D41
Part Description
The SAMA5D4 series is a high-performance, ultra-low-power ARM Cortex-A5 processor-based MPU. The Cortex-A5 runs up to 600MHz and features the ARM NEON SIMD engine, a 128KB L2 cache and a floating-point unit. It supports multiple memories, including DDR2 and LPDDR2. It integrates powerful peripherals for connectivity: dual 10/100 EMACs, 3 HS USB ports, 2 SDIO/SD/MMC, 8 UARTs; and for user interface applications: TFT LCD controller, touch controller, 720p hardware video decoder (H264, VP8, MPEG4), and a CMOS sensor (camera) interface. These devices offer advanced security functions to protect customer code and secure external data transfers such as: ARM TrustZone, tamper detection pins, a hardware encryption engine supporting AES, 3DES, as well as secure Hash Algorithm (SHA) and True Random Number Generator (TRNG), secure data storage for private keys, on-the-fly decryption of code stored in external DDR and a secure boot loader. These devices come with a free main-lined Linux distribution.
Part Downloads
Download PCB Footprint from Ultra Librarian
Part Features
- Low System Cost and High Value Integration: - 720p hardware video decoder (H264, VP8, MPEG4) (D43 & D44 only) - 0.8mm ball pitch package reduces PCB design complexity - Simple power management scheme - 4-layer PCB
- Advanced Security: - Hardware encryption engin - Tamper pins and secure key storage - Secure boot
- Extensive Ecosystem: - Free Linux® and Qt SDK - Complete set of C examples for non-OS users - Low-Cost Development board - Multiple third-party software and hardware partners
Part Specifications
| Family | SAMA5 |
| Part Family | SAMA5D4 |
| Part Prefix | AT |
| Architecture | 32 |
| Core | Cortex-A5 |
| MaxSpeed (MHz) | 600 |
| CPU Type | Cortex-A5 |
| CPU Speed (MIPS/DMIPS) | 942 |
| ARM Neon | Yes |
| FPU | Yes |
| MPU | Yes |
| Program Memory Type | ROMless |
| Boot Memory (KB) | 128 |
| L1 Cache Memory (Instructions) (KB) | 32 |
| L1 Cache Memory (Data) (KB) | 32 |
| L2 Cache Memory (Kbytes) | 128 |
| RAM (bytes) | 131072 |
| Direct Memory Access (DMA) Channels | 38 |
| # of EBIs | 1 |
| External Memory Bus Interface | Program/Data |
| SDIO/SD-CARD/eMMC | 2 |
| DRAM Memory Bus Size (Bits) | 16 |
| DRAM Memory Interface | LPDDR/DDR2/LPDDR2 |
| NAND Interface | Yes |
| ECC Bits on NAND interface | 24 |
| Temp. Range Min. | -40 |
| Temp. Range Max. | 85 |
| Operation Voltage Min.(V) | 1.62 |
| Operation Voltage Max.(V) | 1.98 |
| Max I/O Pins | 152 |
| Pin Count | 289 |
| Power On Reset (POR) | Yes |
| Internal Voltage Reference (Bandgap) | Yes |
| Internal Oscillator | 32kHz, 12MHz |
| Vbat/Vddbu for battery backup | True |
| Number of ADCs | 1 |
| ADC Channels | 5 |
| Max ADC Sampling Rate (ksps) | 320 |
| Max ADC Resolution (bits) | 12 |
| Max ADC Sample/Hold (S/H) | 1 |
| Zero Cross Detect | True |
| ADC With Computation | True |
| Resistive Touch Controller | Yes |
| UART | 7 |
| SPI™ | 8 |
| I2C | 4 |
| SSC | 2 |
| IrDA | Yes |
| ISO 7816 | 5 |
| Max 16 Bit Digital Timers | 4 |
| Max 32 Bit Digital Timers | 9 |
| Hardware RTCC | Yes |
| Periodic Interval Timer (PIT) | 20-bit Programmable |
| Watch Dog Timers (WDT) | Yes |
| Timers | 13 |
| Stand alone PWM | 9 |
| Motor Control PWM Channels | 8 |
| Standalone Output Compare/ Standard PWM | 9 |
| Input Capture | 9 |
| Max # PWM outputs (including complementary outputs) | 16 |
| Number of PWM Time Bases | 13 |
| PWM Max Resolution (bits) | 32 |
| PWM Resolution (time ns) | 2 |
| Output Compare Channels | 9 |
| Quadrature Encoder Interface (QEI) | 3 |
| Number of USB Modules | 3 |
| USB Interface | High Speed |
| Device and Host | 1 HS |
| Host Only | 2 HS |
| Type of CAN module | None |
| Ethernet | 10/100 Base-TX Mac |
| Number of Ethernet Ports | 2 |
| 10/100 Ethernet MAC | 2 |
| Ethernet PTP & AVB Support | Ethernet PTP |
| CRC | Yes |
| Integrity Check Monitor (ICM) | Yes |
| Crypto Engine | Yes |
| ARM Trust Zone | Yes |
| Secure Bootloader | Yes |
| Anti-Tamper Pins | 6 |
| Secure Key Storage (Fuse bits) | 512 |
| Secure RAM Storage (Kbytes) | 8 |
| Secure Register Storage (bits) | 512 |
| On-The-Fly External Memory Encryption/Descryption | Yes |
| LCD/Graphics Interface | Yes |
| Graphic LCD (GLCD) (bits) | 24-bit |
| # of Graphic LCD Overlays | 4 |
| Camera Interface | Yes |
| CODEC Interface (I2S, AC97) | Yes |
| Peripheral Pin Select (PPS)/Pin Muxing | Yes |
| Parallel Port | EBI |
| JTAG | Debug/Program/Boundary Scan |
| Debug Interface | JTAG, SWD |
| Temperature Range | -40C to +85C |
Alternative Part Descriptions
- 32-Bit ARM Based Microcontroller Cortex-A5 RISC 128KB ROM 1.8V 289-Ball LFBGA T/R | Avnet America
- 32-Bit ARM Based Microcontroller Cortex-A5 RISC 128KB ROM 1.8V 289-Ball LFBGA T/R | Avnet Europe