MAX105ECS+ by Analog Devices

Dual, 6-Bit, 800Msps ADC with On-Chip, Wideband Input Amplifier

Status: Active
Series: MAX105
RoHS: Unknown
Download Datasheet Visit Manufacturer Site View Pricing & Stock
The MAX105 is a dual, 6-bit, analog-to-digital converter (ADC) designed to allow fast and precise digitizing of in-phase (I) and quadrature (Q) baseband signals. The MAX105 converts the analog signals of both I and Q components to digital outputs at 800Msps while achieving a signal-to-noise ratio (SNR) of typically 37dB with an input frequency of 200MHz, and an integral nonlinearity (INL) and differential nonlinearity (DNL) of ±0.25 LSB. The MAX105 analog input preamplifiers feature a 400MHz, -0.5dB, and a 1.5GHz, -3dB analog input bandwidth. Matching channel-to-channel performance is typically 0.04dB gain, 0.1 LSB offset, and 0.2 degrees phase. Dynamic performance is 36.4dB signal-to-noise plus distortion (SINAD) with a 200MHz analog input signal and a sampling speed of 800MHz. A fully differential comparator design and encoding circuits reduce out-of-sequence errors, and ensure excellent metastable performance of only one error per 1016 clock cycles. In addition, the MAX105 provides LVDS digital outputs with an internal 6:12 demultiplexer that reduces the output data rate to one-half the sample clock rate. Data is output in two's complement format. The MAX105 operates from a +5V analog supply and the LVDS output ports operate at +3.3V. The data converter's typical power dissipation is 2.6W. The device is packaged in an 80-pin, TQFP package with exposed paddle, and is specified for the extended (-40° C to +85°C) temperature range. For a lower-speed, 400Msps version of the MAX105, please refer to the MAX107 data sheet.

Where to Buy

Prices starting from US$45.22

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Features

Two Matched 6-Bit, 800Msps ADCs
Excellent Dynamic Performance 36.4dB SINAD at fIN ≈ 200MHz and fCLK ≈ 800MHz
36.4dB SINAD at fIN ≈ 200MHz and
fCLK ≈ 800MHz
Typical INL and DNL: ±0.25 LSB
Channel-to-Channel Phase Matching: ±0.2°
Channel-to-Channel Gain Matching: ±0.04dB
6:12 Demultiplexer reduces the Data Rates to 400MHz
Low Error Rate: 1016 Metastable States at 800Msps
LVDS Digital Outputs in Two's Complement Format

Specifications

Resolution (bits) 6
# Input Channels 2
Sample Rate (Msps) (max) 800
Data Bus Interface µP/8DemuxedLVPECL
AC Specs (MHz) (@ fIN) 200
SFDR (dBc) (min) 45
ENOB (bits) (min) 5.8
SINAD (dB) 36.4
SNR (dB) 37
THD (dB) -44.5
DNL (±LSB) 0.25
INL (±LSB) 0.2
Package/Pins TQFP/80
BudgetaryPrice (See Notes) 42.26

MAX105ECS+ Data & Signal Conversion by Analog Devices

ADC 2-CH FLASH 6BIT 800MSPS TQFP-80

Semiconductors - ICs
> Data & Signal Conversion
> Analog-to-Digital Converters - ADC
Status: Unknown
Series: Dual 6-Bit Flash ADCs
RoHS: Unknown
Download Datasheet Visit Manufacturer Site View Pricing & Stock
The MAX105 is a dual, 6-bit, analog-to-digital converter (ADC) designed to allow fast and precise digitizing of in-phase (I) and quadrature (Q) baseband signals. The MAX105 converts the analog signals of both I and Q components to digital outputs at 800Msps while achiev- ing a signal-to-noise ratio (SNR) of typically 37dB with an input frequency of 200MHz, and an integral nonlin- earity (INL) and differential nonlinearity (DNL) of ±0.25 LSB. The MAX105 analog input preamplifiers feature a 400MHz, -0.5dB, and a 1.5GHz, -3dB analog input bandwidth. Matching channel-to-channel performance is typically 0.04dB gain, 0.1LSB offset, and 0.2 degrees phase. Dynamic performance is 36.4dB signal-to-noise plus distortion (SINAD) with a 200MHz analog input sig- nal and a sampling speed of 800MHz. A fully differen- tial comparator design and encoding circuits reduce out-of-sequence errors, and ensure excellent metastable performance of only one error per 1016 clock cycles. In addition, the MAX105 provides LVDS digital outputs with an internal 6:12 demultiplexer that reduces the out- put data rate to one-half the sample clock rate. Data is output in two’s complement format. The MAX105 oper- ates from a +5V analog supply and the LVDS output ports operate at +3.3V. The data converter’s typical power dissipation is 2.6W. The device is packaged in an 80-pin, TQFP package with exposed paddle, and is specified for the extended (-40°C to +85°C) tempera- ture range. For a lower-speed, 400Msps version of the MAX105, please refer to the MAX107 data sheet.

Specifications

Resolution (Bits) 6bit
Sampling Rate 800MSPS
Input Channel Type Differential
Data Interface Parallel
Supply Voltage Type Single
Supply Voltage Min 4.75V
Supply Voltage Max 5.25V
ADC / DAC Case Style TQFP
No. of Pins 80Pins
Operating Temperature Min -40°C
Operating Temperature Max 85°C
Product Range Dual 6-Bit Flash ADCs
Automotive Qualification Standard -
RoHS Phthalates Compliant To Be Advised
MSL MSL 3 - 168 hours
SVHC No SVHC (15-Jan-2018)

Alternative Descriptions

Dual, 6-Bit, 800Msps ADC with | Analog Devices
ADC, 2-CH, FLASH, 6BIT, 800MSPS, TQFP-80 | Farnell
Adc, 2-Ch, Flash, 6Bit, 800Msps, Tqfp-80 | Newark Electronics

Frequently Asked Questions

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Is the MAX105ECS+ RoHS compliant?

This part has not been flagged as RoHS Compliant.

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Authorised distributors including Analog Devices, element14, Farnell and Newark Electronics have stock available or on a lead time for MAX105ECS+ .

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