100% Tested for Quiescent Current at 20 V
5 V, 10 V, and 15 V Parametric Ratings
Binary Address Decoding on Chip
Break-Before-Make Switching Eliminates Channel
High OFF Resistance, Channel Leakage of u00b1100
pA (Typical) at VDD u2013 VEE = 18 V
Logic-Level Conversion for Digital Addressing
Signals of 3 V to 20 V (VDD u2013 VSS = 3 V to 20 V)
to Switch Analog Signals to 20 VP-P (VDD u2013 VEE =
20 V) Matched Switch Characteristics, rON = 5 u2126
(Typical) for VDD u2013 VEE = 15 V Very Low Quiescent
Power Dissipation Under All Digital-Control Input
and Supply Conditions, 0.2 u00b5W (Typical) at VDD u2013
VSS = VDD u2013 VEE = 10 V
Low ON Resistance,125 u2126 (Typical) Over 15 VP-P
Signal Input Range for VDD u2013 VEE = 18 V
Maximum Input Current of 1 u00b5A at 18 V Over Full
Package Temperature Range, 100 nA at 18 V and
25u00b0C
Wide Range of Digital and Analog Signal Levels
u2013 Digital: 3 V to 20 V
u2013 Analog: u226420 VP-P
PCB Footprint
