Status: | Unknown |
---|---|
Series: | - |
RoHS: | Unknown |
No distributors results available
Operating Range: |
Up to 40 MIPS operation (at 3.0-3.6V): |
Industrial temperature range (-40u00b0C to +85u00b0C) |
Extended temperature range (-40u00b0C to +125u00b0C) |
High temperature range (-40u00b0C to +150u00b0C) High-Performance DSC CPU: |
Modified Harvard architecture |
C compiler optimized instruction set |
16-bit wide data path |
24-bit wide instructions |
Linear program memory addressing up to 4M instruction words |
Linear data memory addressing up to 64 Kbytes |
83 base instructions: mostly 1 word/1 cycle |
Two 40-bit accumulators with rounding and saturation options |
Flexible and powerful addressing modes: |
Indirect |
Modulo |
Bit-Reversed |
Software stack |
16 x 16 fractional/integer multiply operations |
32/16 and 16/16 divide operations |
Single-cycle multiply and accumulate: |
Accumulator write back for DSP operations |
Dual data fetch |
Up to u00b116-bit shifts for up to 40-bit data On-Chip Flash and SRAM: |
Flash program memory |
Data SRAM |
Boot, Secure, and General Security for program Flash Direct Memory Access (DMA): |
8-channel hardware DMA |
Up to 2 Kbytes dual ported DMA buffer area (DMA RAM) to store data transferred via DMA: |
Allows data transfer between RAM and a peripheral while CPU is executing code (no cycle stealing) |
Most peripherals support DMA Timers/Capture/Compare/PWM: |
Timer/Counters, up to five 16-bit timers: |
Can pair up to make two 32-bit timers |
One timer runs as a Real-Time Clock with an external 32.768 kHz oscillator |
Programmable prescaler |
Input Capture (up to four channels): |
Capture on up, down or both edges |
16-bit capture input functions |
4-deep FIFO on each capture |
Output Compare (up to four channels): |
Single or Dual 16-bit Compare mode |
16-bit Glitchless PWM mode |
Hardware Real-Time Clock/Calendar (RTCC): |
Provides clock, calendar, and alarm functions Interrupt Controller: |
5-cycle latency |
118 interrupt vectors |
Up to 53 available interrupt sources |
Up to three external interrupts |
Seven programmable priority levels |
Five processor exceptions Digital I/O: |
Peripheral pin Select functionality |
Up to 35 programmable digital I/O pins |
Wake-up/Interrupt-on-Change for up to 21 pins |
Output pins can drive from 3 |
0V to 3.6V |
Up to 5V output with open drain configuration |
All digital input pins are 5V tolerant |
4 mA sink on all I/O pins System Management: |
Flexible clock options: |
External, crystal, resonator, internal RC |
Fully integrated Phase-Locked Loop (PLL) |
Extremely low jitter PLL |
Power-up Timer |
Oscillator Start-up Timer/Stabilizer |
Watchdog Timer with its own RC oscillator |
Fail-Safe Clock Monitor |
Reset by multiple sources Power Management: |
On-chip 2.5V voltage regulator |
Switch between clock sources in real time |
Idle, Sleep, and Doze modes with fast wake-up Analog-to-Digital Converters (ADCs): |
10-bit, 1.1 Msps or 12-bit, 500 Ksps conversion: |
Two and four simultaneous samples (10-bit ADC) |
Up to nine input channels with auto-scanning |
Conversion start can be manual or synchronized with one of four trigger sources |
Conversion possible in Sleep mode |
u00b12 LSb max integral nonlinearity |
u00b11 LSb max differential nonlinearity Comparator Module: |
Two analog comparators with programmable input/output configuration CMOS Flash Technology: |
Low-power, high-speed Flash technology |
Fully static design |
3.3V (u00b110%) operating voltage |
Industrial and Extended temperature |
Low power consumption Motor Control Peripherals: |
6-channel 16-bit Motor Control PWM: |
Three duty cycle generators |
Independent or Complementary mode |
Programmable dead time and output polarity |
Edge-aligned or center-aligned |
Manual output override control |
One Fault input |
Trigger for ADC conversions |
PWM frequency for 16-bit resolution (@ 40 MIPS) = 1220 Hz for Edge-Aligned mode, 610 Hz for Center-Aligned mode |
PWM frequency for 11-bit resolution (@ 40 MIPS) = 39.1 kHz for Edge-Aligned mode, 19.55 kHz for Center-Aligned mode |
2-channel 16-bit Motor Control PWM: |
One duty cycle generator |
Independent or Complementary mode |
Programmable dead time and output polarity |
Edge-aligned or center-aligned |
Manual output override control |
One Fault input |
Trigger for ADC conversions |
PWM frequency for 16-bit resolution (@ 40 MIPS) = 1220 Hz for Edge-Aligned mode, 610 Hz for Center-Aligned mode |
PWM frequency for 11-bit resolution (@ 40 MIPS) = 39.1 kHz for Edge-Aligned mode, 19.55 kHz for Center-Aligned mode |
2-Quadrature Encoder Interface module: |
Family | 16-bit DSC |
---|---|
Part Family | dsPIC33FJ128MC804 |
Part Prefix | dsPIC |
Architecture | 16 |
Core | 16-bit dsPIC DSC |
MaxSpeed (MHz) | 40 |
CPU Type | 16-bit dsPIC DSC |
CPU Speed (MIPS/DMIPS) | 40 |
Program Memory Type | Flash |
SelfWrite | Yes |
Program Memory Size (KB) | 128 |
Program Memory Size (KWords) | 42 |
Secure Bootloader (CodeGuardā¢ Security) | Advanced |
RAM (bytes) | 16384 |
Emulated EEPROM in Flash | True |
Direct Memory Access (DMA) Channels | 8 |
Temp. Range Min. | -40 |
Temp. Range Max. | 150 |
Operation Voltage Min.(V) | 3 |
Operation Voltage Max.(V) | 3.6 |
Max I/O Pins | 21 |
Pin Count | 28 |
Brown Out Reset (BOR) | BOR |
Low Voltage Detection (LVD) | None |
Power On Reset (POR) | Yes |
Internal Oscillator | 7.37 MHz, 32.768 kHz |
Number of Comparators | 2 |
Comparator max speed (ns) | 150 |
Number of ADCs | 1 |
ADC Channels | 6 |
Diff ADC Inputs | 4 Unipolar Differential Inputs |
Max ADC Sampling Rate (ksps) | 1100 |
Max ADC Resolution (bits) | 12 |
Max ADC Sample/Hold (S/H) | 1 |
Number of DACs | 1 |
Max DAC Resolution (bits) | 4 |
UART | 2 |
SPIā¢ | 2 |
I2C | 1 |
Max 16 Bit Digital Timers | 5 |
Max 32 Bit Digital Timers | 2 |
Watch Dog Timers (WDT) | Yes |
Timers | 11 |
Motor Control PWM Channels | 8 |
Standalone Output Compare/ Standard PWM | 4 |
Input Capture | 4 |
Max # PWM outputs (including complementary outputs) | 12 |
Number of PWM Time Bases | 2 |
PWM Max Resolution (bits) | 16 |
PWM Resolution (time ns) | 12 |
Output Compare Channels | 4 |
USB Interface | None |
Number of CAN Modules | 1 |
Type of CAN module | CAN |
CAN Transmit Buffers | 8 |
CAN Receive Buffers | 32 |
LIN | Yes |
IrDA | Yes |
Ethernet | None |
Integrated Wireless Frequency | None |
Wireless Technology | None |
Class B Hardware | True |
CRC | Yes |
Quadrature Encoder Interface (QEI) | 2 |
Peripheral Pin Select (PPS)/Pin Muxing | Yes |
Parallel Port | PMP |
JTAG | Program/Boundary Scan |
Debug Interface | ICSP |
Keydifferences | DSP, CAN, HS-PWM |
InstructionWord | 24 |
Temperature Range | -40C to +150C |
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