Status: | Active |
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Series: | dsPIC33FJ06GS202A |
RoHS: | Compliant |
Operating Conditions |
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3.0V to 3.6V, -40ºC to +125ºC, DC to 40 MIPS |
Core: 16-Bit dsPIC33F CPU |
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Code Efficient (C and Assembly) Architecture |
Two 40-Bit Wide Accumulators |
Single-Cycle (MAC/MPY) with Dual Data Fetch |
Single-Cycle Mixed-Sign MUL plus Hardware Divide |
32-Bit Multiply Support |
Clock Management |
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±2% Internal Oscillator |
Programmable PLLs and Oscillator Clock Sources |
Fail-Safe Clock Monitor (FSCM) |
Independent Watchdog Timer (WDT) |
Fast Wake-up and Start-up |
Power Management |
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Low-Power Management modes (Sleep, Idle, Doze) |
Integrated Power-on Reset and Brown-out Reset |
2.0 mA/MHz Dynamic Current (typical) |
135 µA IPD Current (typical) |
High-Speed PWM |
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Up to Three PWM Pairs with Independent Timing |
Dead Time for Rising and Falling Edges |
1.04 ns PWM Resolution for Dead Time, Duty Cycle, Phase and Frequency |
PWM Support for: DC/DC, AC/DC, Inverters, PFC and Lighting |
Programmable Fault Inputs |
Flexible Trigger Configurations for ADC Conversions |
Advanced Analog Features |
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Two High-Speed Comparators with Direct Connection to the PWM module |
ADC module: 10-bit resolution with Successive Approximation Register (SAR) converter (2 Msps) and three Sample-and-Hold (S&H) circuits |
Up to 8 input channels grouped into four conversion pairs, plus two inputs for monitoring voltage references |
Flexible and independent ADC trigger sources |
Dedicated Result register for each analog channel |
Timers/Output Compare/Input Capture |
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Two 16-Bit General Purpose Timers/Counters |
Input Capture module |
Output Compare module |
Peripheral Pin Select (PPS) to allow Function Remap |
Communication Interfaces |
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UART module (10 Mbps): With support for LIN/J2602 protocols and IrDA® |
4-Wire SPI module |
I2Câ„¢ module (up to 1 Mbaud) with SMBus Support |
PPS to allow Function Remap |
Architecture | 16 |
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MaxSpeed (MHz) | 40 |
CPU Speed (MIPS/DMIPS) | 40 |
Program Memory Size (KB) | 6 |
Multiple Flash Panels | False |
Temp. Range Min. | -40 |
Temp. Range Max. | 125 |
Operation Voltage Min.(V) | 3 |
Operation Voltage Max.(V) | 3.6 |
Pin Count | 28 |
Low Power | No |
Number of Comparators | 2 |
Number of ADCs | 1 |
ADC Channels | 6 |
Max ADC Resolution (bits) | 10 |
Max ADC Sampling Rate (ksps) | 2000 |
Number of DACs | 2 |
DAC outputs | 1 |
Max DAC Resolution (bits) | 10 |
Hardware RTCC | No |
Motor Control PWM Channels | 4 |
SMPS PWM Channels | 4 |
Number of PWM Time Bases | 2 |
Output Compare Channels | 1 |
USB Interface | None |
Number of CAN Modules | 0 |
Type of CAN module | None |
Crypto Engine | No |
Quadrature Encoder Interface (QEI) | 0 |
Segment LCD | 0 |
LCD/Graphics Interface | No |
Configurable Logic Cell Modules (CLC /CCL) | 0 |
Peripheral Pin Select (PPS)/Pin Muxing | Yes |
Pins | Packaging | 28 | QFN-S |
Temp Range | -40C to +125C |
Packing Media | Tube (61) |
Code Examples |
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Cycle by cycle control with external period reset |
Programming Specifications |
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16-Bit MCU and DSC Programmer's Reference Manual |
dsPIC33F Flash Programming Specification |
JEDEC Indicator | e3 |
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ROHS | Compliant |
China EFUP | Compliant |
Device Weight (g) | 0.1016 |
Shipping Weight (kg) | 0.163934 |
Lead Count | 28 |
Package Type | QFN-S |
Package Width or Size | 6x6x0.9mm |
Soldering Composition | Matte Tin |
40 Mips, 6 Kb Flash, 1024 Bytes Ram, Smps Peripherals 28 Qfn-S 6X6X0.9Mm Tube Rohs Compliant: Yes |Microchip DSPIC33FJ06GS202A-E/MM | Newark Electronics |
40 MIPS, 6 KB Flash, 1024 Bytes RAM, SMPS Peripherals | Microchip Technology Inc. DSPIC33FJ06GS202A-E/MM | RS Americas |
DSC, 40MHZ, 6KB, QFNS-EP-28 | Farnell |
MCU 16-bit dSPIC33 dsPIC RISC 6KB Flash 3.3V 28-Pin QFN-S EP Tube | Avnet America |
Where can I find additional details, specifications and documents for a DSPIC33FJ06GS202A-E/MM?
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Is the DSPIC33FJ06GS202A-E/MM RoHS compliant?
Yes. This part has been flagged as RoHS Compliant by Microchip Technology.
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