DSPIC33EP128GS806T-E/PT Part Information
Details for DSPIC33EP128GS806T-E/PT by Microchip Technology
dsPIC33EP128GS806
Part Description
dsPIC33EPXXGS70X/80X is a SMPS & Digital Power Conversion Digital Signal Controller. These devices offer features supporting common, multi-loop digital switch-mode power supplies (SMPS) and other digital power-conversion applications such as: • AC to DC Converters • DC to DC Converters • Power Factor Correction (PFC) • Uninterruptible power supply (UPS) • Inverters • Embedded Power-Supply Controllers • Arc Fault Detection The dsPIC33EPXXGS70X/80X family has many features that help simplify functional safety certifications for ASIL-B and ASIL-C focused applications including: • Functional Safety Manual and FMEDA available under NDA upon request to your sales office • MPLAB XC Compiler Functional Safety Manual available with registration • Learn more about our functional safety capabilities including hardware, software, and supporting collateral
Part Downloads
Download PCB Footprint from Ultra Librarian
Part Features
- Operating Conditions
- 3.0V to 3.6V, -40°C to +85°C, DC to 70 MIPS
- 3.0V to 3.6V, -40°C to +125°C, DC to 60 MIPS Flash Architecture
- Dual Partition Flash Program Memory with Live Update
- Supports programming while operating
- Supports partition soft swap Core: 16-Bit dsPIC33E CPU
- Two 40-Bit Wide Accumulators
- Code-Efficient (C and Assembly) Architecture
- Single-Cycle (MAC/MPY) with Dual Data Fetch
- Single-Cycle Mixed-Sign MUL Plus Hardware Divide
- 32-Bit Multiply Support
- Four Additional Working Register Sets (reduces context switching) High-Speed PWM
- Individual Time Base and Duty Cycle for each PWM
- 1.04 ns PWM Resolution (frequency, duty cycle, dead time and phase)
- Supports Center-Aligned, Redundant, Complementary and True Independent Output modes
- Independent Fault and Current-Limit Inputs
- Output Override Control
- PWM Support for AC/DC, DC/DC, Inverters, PFC and Lighting Advanced Analog Features
- High-Speed ADC module
- 12-bit with 4 dedicated SAR ADC cores and one shared SAR ADC core
- Configurable resolution (up to 12-bit) for each ADC core
- Up to 3.25 Msps conversion rate per channel at 12-bit resolution
- 11 to 22 single-ended inputs
- Dedicated result buffer for each analog channel
- Flexible and independent ADC trigger sources
- Two digital comparators
- Two oversampling filters for increased resolution
- Four Rail-to-Rail Comparators with Hysteresis:
- Dedicated 12-bit Digital-to-Analog Converter (DAC) for each analog comparator
- Up to two DAC reference outputs
- Up to two external reference inputs
- Two Programmable Gain Amplifiers:
- Single-ended or independent ground reference
- Five selectable gains (4x, 8x, 16x, 32x and 64x)
- 40 MHz gain bandwidth Interconnected SMPS Peripherals
- Reduces CPU Interaction to Improve Performance
- Flexible PWM Trigger Options for ADC Conversions High-Speed Comparator Truncates PWM (15 ns typical):
- Supports Cycle-by-Cycle Current mode control
- Current Reset mode (variable frequency) Timers/Output Compare/Input Capture
- 16-Bit and up to two 32-Bit Timers/Counters
- Output Compare (OC) modules, Configurable as Timers/Counters
- Input Capture (IC) modules
Part Specifications
| Family | 16-bit DSC |
| Part Family | dsPIC33EP128GS808 |
| Part Prefix | dsPIC |
| Architecture | 16 |
| Core | 16-bit dsPIC DSC |
| MaxSpeed (MHz) | 70 |
| CPU Type | 16-bit dsPIC DSC |
| CPU Speed (MIPS/DMIPS) | 70 |
| Program Memory Type | Flash |
| SelfWrite | Yes |
| Program Memory Size (KB) | 128 |
| Program Memory Size (KWords) | 64 |
| Multiple Flash Panels | True |
| Secure Bootloader (CodeGuard™ Security) | None |
| RAM (bytes) | 8192 |
| Emulated EEPROM in Flash | True |
| Direct Memory Access (DMA) Channels | 4 |
| Temp. Range Min. | -40 |
| Temp. Range Max. | 125 |
| Operation Voltage Min.(V) | 3 |
| Operation Voltage Max.(V) | 3.6 |
| Max I/O Pins | 51 |
| Pin Count | 64 |
| Brown Out Reset (BOR) | BOR |
| Low Voltage Detection (LVD) | None |
| Power On Reset (POR) | Yes |
| Internal Voltage Reference (Bandgap) | Yes |
| Internal Oscillator | 7.37 MHz, 32 kHz |
| Internal Osc better than 1% accuracy | True |
| Number of Comparators | 4 |
| Comparator max speed (ns) | 15 |
| Number of ADCs | 5 |
| ADC Channels | 22 |
| Diff ADC Inputs | Psuedo Differential Inputs |
| Max ADC Sampling Rate (ksps) | 3250 |
| Max ADC Resolution (bits) | 12 |
| Max ADC Sample/Hold (S/H) | 5 |
| Number of DACs | 4 |
| DAC outputs | 2 |
| Max DAC Resolution (bits) | 12 |
| Programmable Gain Amp (PGA) | 2 |
| UART | 2 |
| SPI™ | 3 |
| I2C | 2 |
| Max 16 Bit Digital Timers | 5 |
| Max 32 Bit Digital Timers | 2 |
| Watch Dog Timers (WDT) | Yes |
| Timers | 5 |
| Stand alone PWM | 8 |
| SMPS PWM Channels | 10 |
| Standalone Output Compare/ Standard PWM | 4 |
| Input Capture | 4 |
| Max # PWM outputs (including complementary outputs) | 10 |
| Number of PWM Time Bases | 5 |
| PWM Max Resolution (bits) | 16 |
| PWM Resolution (time ns) | 1 |
| Output Compare Channels | 4 |
| USB Interface | None |
| Number of CAN Modules | 2 |
| Type of CAN module | CAN |
| Ethernet | None |
| Integrated Wireless Frequency | None |
| Wireless Technology | None |
| Configurable Logic Cell Modules (CLC /CCL) | 4 |
| Configurable Logic Cell Modules (CLC /CCL) Type | CLC |
| Peripheral Trigger Generator (PTG) | True |
| Peripheral Pin Select (PPS)/Pin Muxing | Yes |
| JTAG | Boundary Scan |
| Keydifferences | CAN |
| Include in Focus Product Selector Guide | True |
| Supported in MPLAB Code Configurator | Yes |
| Temperature Range | -40C to +125C |
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