DSPIC33CK256MP203-I/M5 Part Information
Details for DSPIC33CK256MP203-I/M5 by Microchip Technology
dsPIC33CK256MP203
Part Description
Microchip’s dsPIC33CK family of digital signal controllers (DSCs) features a single 100 MIPS 16-bit dsPIC® DSC core with integrated DSP and enhanced on-chip peripherals. These DSCs enable the design of high-performance, precision motor control systems that are more energy efficient, quieter in operation and provide extended motor life. They can be used to control BLDC, PMSM, ACIM, SR and stepper motors. These DSCs are also ideal for switched mode power supplies such as AC/DC, DC/DC, UPS and PFC, providing high-precision digital control of Buck, Boost, Fly-Back, Half-Bridge, Full-Bridge, LLC and other power circuits to reach the highest possible energy efficiency. These devices are also ideal for high-performance general-purpose and robust applications.
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Part Specifications
| Family | 16-bit DSC |
| Part Family | dsPIC33CK256MP508 |
| Part Prefix | dsPIC |
| Architecture | 16 |
| Core | 16-bit dsPIC DSC |
| MaxSpeed (MHz) | 100 |
| CPU Type | 16-bit dsPIC DSC |
| CPU Speed (MIPS/DMIPS) | 100 |
| Program Memory Type | Flash |
| SelfWrite | Yes |
| Program Memory Size (KB) | 256 |
| Program Memory Size (KWords) | 128 |
| ECC Program Flash (Error Correction Code) | True |
| Multiple Flash Panels | True |
| Secure Bootloader (CodeGuard™ Security) | Basic |
| RAM (bytes) | 24576 |
| Emulated EEPROM in Flash | True |
| Direct Memory Access (DMA) Channels | 4 |
| External Memory Bus Interface | Data |
| Temp. Range Min. | -40 |
| Temp. Range Max. | 125 |
| Operation Voltage Min.(V) | 3 |
| Operation Voltage Max.(V) | 3.6 |
| Max I/O Pins | 29 |
| Pin Count | 36 |
| Brown Out Reset (BOR) | BOR |
| Low Voltage Detection (LVD) | None |
| Power On Reset (POR) | Yes |
| Internal Voltage Reference (Bandgap) | Yes |
| Internal Oscillator | 8MHz, 32kHz |
| Internal Osc better than 1% accuracy | True |
| Number of Comparators | 3 |
| Comparator max speed (ns) | 15 |
| Number of ADCs | 3 |
| ADC Channels | 16 |
| Diff ADC Inputs | 16 |
| Max ADC Sampling Rate (ksps) | 3500 |
| Max ADC Resolution (bits) | 12 |
| Max ADC Sample/Hold (S/H) | 3 |
| Number of DACs | 3 |
| DAC outputs | 1 |
| Max DAC Resolution (bits) | 12 |
| Number of Op Amps | 3 |
| Temp Sensor | Yes |
| Slope Compensation Programmable Ramp Generator | Yes |
| Zero Cross Detect | True |
| ADC With Computation | True |
| UART | 3 |
| SPI™ | 3 |
| I2C | 3 |
| I2S | 3 |
| Max 16 Bit Digital Timers | 10 |
| Max 32 Bit Digital Timers | 4 |
| Watch Dog Timers (WDT) | Yes |
| Timers | 10 |
| Single output CCP (SCCP) | 8 |
| Multiple output CCP (MCCP) | 1 |
| Motor Control PWM Channels | 12 |
| SMPS PWM Channels | 12 |
| Input Capture | 9 |
| Max # PWM outputs (including complementary outputs) | 26 |
| Number of PWM Time Bases | 15 |
| PWM Max Resolution (bits) | 16 |
| PWM Resolution (time ns) | 0.25 |
| Output Compare Channels | 14 |
| USB Interface | None |
| Type of CAN module | CAN-FD |
| CAN Transmit Buffers | 224 |
| CAN Receive Buffers | 224 |
| LIN | Yes |
| IrDA | Yes |
| Ethernet | None |
| Integrated Wireless Frequency | None |
| Wireless Technology | None |
| Class B Hardware | True |
| CRC | Yes |
| Quadrature Encoder Interface (QEI) | 2 |
| CODEC Interface (I2S, AC97) | Yes |
| Configurable Logic Cell Modules (CLC /CCL) | 4 |
| Configurable Logic Cell Modules (CLC /CCL) Type | CLC |
| Peripheral Trigger Generator (PTG) | True |
| Peripheral Pin Select (PPS)/Pin Muxing | Yes |
| JTAG | Boundary Scan |
| Debug Interface | ICSP |
| Include in Focus Product Selector Guide | True |
| Supported in MPLAB Code Configurator | Yes |
| Temperature Range | -40C to +85C |
Alternative Part Descriptions
- 16 BIT DSC, 256KB FLASH, 24KB RAM, 100MHZ, 28PIN, 3 OPAMP, 3 COMP, PTG, 36 UQFN 5X5X0.6MM TUBE ROHS COMPLIANT: YES | Newark Electronics
- 16 BIT DSC, 256KB FLASH, 24KB RAM, 100MHZ, 28PIN, 3 OPAMP, 3 COMP, PTG | Avnet America