CDCM7005RGZT Part Information

Details for CDCM7005RGZT by Texas Instruments

Semiconductors - ICs > Clock Timing & Frequency Management > Phase Locked Loops - PLL

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Part Description

The CDCM7005 is a high-performance, low phase noise and low skew clock synchronizer that synchronizes a VCXO (voltage controlled crystal oscillator) or VCO (voltage controlled oscillator) frequency to one of the two reference clocks. The programmable pre-divider M and the feedbackdividers N and P give a high flexibility to the frequency ratio of the reference clock to VC(X)O VC(X)O_IN clock operates the selection of external components, the PLL loop factor can be adjust to requirements. up to 2.2 GHz. Through VC(X)O and loop filter bandwidth and damping meet different system The CDCM7005 can lock to one of two reference clock inputs (PRI_REF and SEC_REF), supports frequency hold-over mode and fast-frequency-locking for fail-safe and increased system redundancy. The outputs of the CDCM7005 are user definable and can be any combination of up to five LVPECL outputs or up to 10 LVCMOS outputs. The built in synchronization latches ensure that all outputs are synchronized for low output skew.

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Part Features

  • 3.3-V Power Supply
  • Accepts LVCMOS Input Frequencies up to 200 MHz
  • Analog and Digital PLL Lock Indication
  • Dedicated Charge Pump Supply (VCC_CP) for Wide Tuning Voltage Range VCOs
  • Efficient Jitter Cleaning From Low PLL Loop Bandwidth
  • Frequency Hold-Over Mode Improves Fail-Safe Operation
  • High Performance LVPECL and LVCMOS PLL Clock Synchronizer
  • Industrial Temperature Range u201340u00b0C to 85u00b0C
  • Low Phase Noise PLL Core
  • Output Frequency is Selectable by u00d71, /2, /3, /4, /6, /8, /16 on Each Output Individually
  • Outputs Can Be a Combination of LVPECL and LVCMOS (Up to Five Differential LVPECL Outputs or up to 10 LVCMOS Outputs)
  • Packaged in 64-Pin BGA (0.8 mm Pitch u2013 ZVA) or 48-Pin QFN (RGZ)
  • Power-up Control Forces LVPECL Outputs to 3- State at VCC < 1.5 V
  • Presets Charge Pump to VCC_CP/2 for Fast Center-Frequency Setting of VC(X)O
  • Programmable Phase Offset (PRI_REF and SEC_REF to Outputs)
  • Provides VBB Bias Voltage Output for Single- Ended Input Signals (VCXO_IN)
  • SPI Controllable Device Setting
  • Two Reference Clock Inputs (Primary and Secondary Clock) for Redundancy Support With Manual or Automatic Selection
  • VCXO_IN Clock is Synchronized to One of the Two Reference Clocks
  • VCXO_IN Frequencies Up to 2.2 GHz (LVPECL)
  • Wide Charge Pump Current Range From 200 u03bcA to 3 mA

Part Specifications

PLL Type Clock Synchronizer
Frequency 2.2GHz
No. of Pins 48Pins
PLL Case Style VQFN
Supply Voltage Min 3V
Supply Voltage Max 3.6V
Operating Temperature Min -40°C
Operating Temperature Max 85°C
Product Range -
RoHS Phthalates Compliant Yes
MSL MSL 2 - 1 year
SVHC No SVHC (27-Jun-2018)
RoHS Compliant

Alternative Part Descriptions

  • High performance, low phase noise, low skew clock synchronizer that synchronizes ref clock to VCXO | Texas Instruments

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