ATSAME70J20B-AN More Semiconductors - ICs by Microchip Technology

Status: Active
Series: ATSAME70J20
RoHS: Compliant
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The Microchip SAME70J20 devices are members of a flash microcontrollers family based on the high-performance 32-bit ARM Cortex-M7 processor with Floating Point Unit (FPU). These devices operate at up to 300MHz and feature up to 1024 Kbytes of Flash, up to 384 Kbytes of multi-port SRAM and configurable Instruction and Data Tightly Couple Memories to leverage the advanced DSP capabilities of the core. SAME70J20 features multiple networking/connectivity peripherals, including CAN-FD interface and one 1O/100Mbps Ethernet MAC with specific hardware support for Audio Video Bridging (AVB). Additional communication interfaces include a FS USB Host and Device, USARTs, SPIs and multiple TWIs. Analog features include single 2Msps 12-bit ADCs with analog front end offering offset and gain error correction, and 2Msps 12-bit DAC.

The SAME70J20 is available in 64-pin QFP package options.

Note: While there are no plans to change the availability status of Revision A for this device, new designs should use Revision B for prototypes and production.
 

Supported by MPLAB X IDE and MPLAB Harmony.

Prices starting from US$9.24


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Logo for Microchip Technology Microchip Technology US$9.24
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Logo for Newark Electronics Newark Electronics US$10.54
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Logo for Avnet America Avnet America US$12.81
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Features

ARM® Cortex®-M7 running up to 300MHz
16 Kbytes of ICache and 16 Kbytes of DCache with Error Code Correction (ECC)
Single- and double-precision HW Floating Point Unit (FPU)
Memory Protection Unit (MPU) with 16 zones
DSP Instructions, Thumb®-2 Instruction Set
Embedded Trace Module (ETM) with instruction trace stream, including Trace Port Interface Unit (TPIU)
1024 Kbytes embedded Flash with unique identifier and user signature for user-defined data
384 Kbytes embedded Multi-port SRAM
Tightly Coupled Memory (TCM) interface with four configurations (disabled, 2 x 32 Kbytes, 2 x 64 Kbytes, 2 x 128 Kbytes)
16 Kbytes ROM with embedded Bootloader routines (UART0, USB) and IAP routines
16-bit Static Memory Controller (SMC) with support for SRAM, PSRAM, LCD module, NOR and NAND Flash with on-the-fly scrambling
16-bit SDRAM Controller (SDRAMC) interfacing up to 256 MB and with on-the-fly scrambling
Embedded voltage regulator for single-supply operation
Power-on-Reset (POR), Brown-out Detector (BOD) and Dual Watchdog for safe operation
Quartz or ceramic resonator oscillators: 3 to 20 MHz main oscillator with failure detection, 12 MHz or 16 MHz needed for USB operations. Optional low-power 32.768 kHz for RTC or device clock
RTC with Gregorian calendar mode, waveform generation in low-power modes
RTC counter calibration circuitry compensates for 32.768 kHz crystal frequency variations
32-bit low-power Real-time Timer (RTT)
High-precision Main RC oscillator with 12 MHz default frequency for device startup. In-application trimming access for frequency adjustment. 8/12 MHz are factory-trimmed.
32.768 kHz crystal oscillator or Slow RC oscillator as source of low-power mode device clock (SLCK)
One 500 MHz PLL for system clock, one 480 MHz PLL for USB high-speed operations
Temperature Sensor
One dual-port 24-channel central DMA Controller (XDMAC)
Low-power Sleep, Wait and Backup modes, with typical power consumption down to 1.1 μA in Backup mode with RTC, RTT and wakeup logic enabled
Ultra-low-power RTC and RTT
1 Kbyte of backup RAM (BRAM) with dedicated regulator
One Ethernet MAC (GMAC) 10/100 Mbps in MII mode and RMII with dedicated DMA. IEEE1588 PTP frames and 802.3az Energy-efficiency support. Ethernet AVB support with IEEE802.1AS Timestamping and IEEE802.1Qav credit-based traffic-shaping hardware support
USB 2.0 Device/Mini Host High-speed (USBHS) at 480 Mbps, 4-Kbyte FIFO, up to 10 bidirectional endpoints, dedicated DMA
12-bit ITU-R BT. 601/656 Image Sensor Interface (ISI)
ISO CAN FD; ISO 1189801:2015 (Revision B only)
Three USARTs. USART0/1/2 support LIN mode, ISO7816, IrDA®, RS-485, SPI, Manchester and Modem modes; USART1 supports LON mode.
Five 2-wire UARTs with SleepWalkingâ„¢ support
Three Two-Wire Interfaces (TWIHS) (I2C-compatible) with SleepWalkingâ„¢ support
Quad I/O Serial Peripheral Interface (QSPI) interfacing up to 256 MB Flash and with eXecute-In-Place and on-the-fly scrambling
Two Serial Peripheral Interfaces (SPI)
One Serial Synchronous Controller (SSC) with I2S and TDM support
Two Inter-IC Sound Controllers (I2SC)
One High-speed Multimedia Card Interface (HSMCI) (SDIO/SD Card/e.MMC)
Four Three-Channel 16-bit Timer/Counters (TC) with Capture, Waveform, Compare and PWM modes, constant on time. Quadrature decoder logic and 2-bit Gray Up/Down Counter for stepper motor
Two 4-channel 16-bit PWMs with complementary outputs, Dead Time Generator and eight fault inputs per PWM for motor control, two external triggers to manage power factor correction (PFC), DC-DC and lighting control.
Two Analog Front-End Controllers (AFEC), each supporting up to 12 channels with differential input mode and programmable gain stage, allowing dual sample-and-hold at up to 1.7 Msps. Offset and gain error correction feature.
One 2-channel 12-bit 1 Msps-per-channel Digital-to-Analog Controller (DAC) with Differential and Over Sampling modes
One Analog Comparator Controller (ACC) with flexible input selection, selectable input hysteresis
True Random Number Generator (TRNG)
AES: 256-, 192-, 128-bit Key Algorithm, Compliant with FIPS PUB-197 Specifications
Integrity Check Monitor (ICM). Supports Secure Hash Algorithm SHA1, SHA224 and SHA256.
Up to 114 I/O lines with external interrupt capability (edge- or level-sensitivity), debouncing, glitch filtering and On-die Series Resistor Termination
Five Parallel Input/output Controllers (PIO)
Single Supply voltage from 1.7V to 3.6V for Industrial Temperature Devices
LQFP64, 64-lead LQFP, 10 x 10 mm, pitch 0.5 mm

Specifications

Part Family SAME70
CPU Type Cortex-M7
MaxSpeed (MHz) 300
Program Memory Size (KB) 1024
SRAM (KB) 384
Data EEPROM (bytes) 0
Temp. Range Min. -40
Temp. Range Max. 105
Operation Voltage Min.(V) 1.7
Operation Voltage Max.(V) 3.6
Direct Memory Access (DMA) Channels 24
SPIâ„¢ 1
I2C 2
UART 5
I2S 1
Ethernet Ethernet AVB
Quadrature Encoder Interface (QEI) 1
Hardware Touch Peripheral None
Crypto Engine Yes
Number of USB Modules 1
USB Interface High Speed
Number of CAN Modules 1
Type of CAN module CAN-FD
ADC Channels 5
Max ADC Resolution (bits) 12
Max ADC Sampling Rate (ksps) 1700
Number of DACs 1
Input Capture 3
Standalone Output Compare/ Standard PWM 3
Motor Control PWM Channels 15
Max 16 Bit Digital Timers 12
Number of Comparators 1
Internal Oscillator 4,8,12Mhz, 32Khz
Hardware RTCC Yes
Max I/O Pins 44
Pin Count 64
Low Power No
Pins | Packaging 64 | LQFP
Temp Range -40C to +105C
Packing Media Tray (160)

Resources



Application Notes
AN3346 - Introduction to MPLAB X IDE and MPLAB Harmony v3 for Atmel Studio and ASF users
AN3443 - Execute-In-Place (XIP) with QSPI on Cortex-M7 MCUs Using MPLAB Harmony v3
AN3466 - Using XDMAC with QSPI on Arm Cortex-M7 MCUs Using MPLAB Harmony v3 Application Note
AN3475 - File Transfer Protocol Using MPLAB Harmony v3 TCP/IP Stack Application Note
AN_44047 - How to Optimize Usage of SAM V7x/E7x/S7x Architecture
AN_44027 - True Random Number Generator Architecture and Tests for |SMART SAM V71/V70/E70/S70 MCUs
AN_42622 - AT13723:Getting Started with FreeRTOS on SAMV/S/E MCUs
AN_42382 - AT04056: Getting Started with FreeRTOS on SAM Flash MCUs
AN_44046 - Using the Analog Front End in the SAM V7/E7/S7 MCUs
AN_44045 - Advanced Debugging with ETM for SAM V7/E7/S7 MCUs
AN_42336 - AT09331: ASF USB Stack Manual
AN2468 - Production Programming of Microchip AVR and SAM Microcontrollers
AN_44093 - AFE Calibration on SAM V/E/S7x Microcontrollers
AN2587 - EMI, EMC, EFT, and ESD Circuit Design Consideration for 32-bit Microcontrollers Application Note
AN2584 - Integrated Power Factor Correction (PFC) and Sensorless
AN2757 - Sensored (Encoder-Based) Field Oriented Control of a Three Phase Permanent Magnet Synchronous Motor (PMSM)
MPLAB Harmony v3 Project Migration




Legacy Collaterals
AN_42670 - AT12859: USB Host MSC Class For SAM S70/E70/V70
AN_42438 - AT09423: SAM-BA Overview and Customization Process
AN_42344 - AT09339: USB Host Interface (UHI) for Mass Storage Class (MSC)
AN_42346 - AT09341: USB Host Interface (UHI) for Vendor Class Device
AN_42338 - AT09333: USB Host Interface (UHI) for Communication Class Device (CDC)
AN_42342 - AT09337: USB Host Interface (UHI) for Human Interface Device Mouse (HID Mouse)
AN_42337 - AT09332: USB Device Interface (UDI) for Communication Class Device (CDC)
AN_42345 - AT09340: USB Device Interface (UDI) for Vendor Class Device
AN_42339 - AT09334: USB Device Interface (UDI) for Human Interface Device Generic (HID Generic)
AN_42703 - AT12869: ICM Usage on SAM S/E/V70/71 Microcontrollers
AN_42646 - AT12863: Interfacing LCD Controllers for SAM S70/E70/V70
AN_42565 - AT13722: USB Dual Role Implementation on SAM V7x E7x S7x
AN_42341 - AT09336: USB Device Interface (UDI) for Human Interface Device Mouse (HID Mouse)
AN_42343 - AT09338: USB Device Interface (UDI) for Mass Storage Class (MSC)
AN_42340 - AT09335: USB Device Interface (UDI) for Human Interface Device Keyboard (HID Keyboard)
AN_42725 - AT16743: SAM V7/E7/S7 Safe and Secure Bootloader
AN_42738 - AT16827: TCP/IP Server-Client with CycloneTCP
AN_42728 - AT15004:Using SAM-BA for Linux on SAM Devices
AN_42761 - AT17417: Usage of XDMAC on SAM S/SAM E/SAM V
AN_42782 - AT17629: SAM E70/V70 Ethernet Bootloader
Microprocessor or Microcontroller
ASF4 API Reference Manual


Supporting Collateral
How to Setup MPLAB Harmony v3 Software Development Framework
How to Use the MPLAB Harmony v3 Debug System Service
The Difference Between MPLAB Harmony v3 PLIBs and Drivers, and When to Use Them
MPLAB Harmony v3 Synchronous Drivers and Their Usage in FreeRTOS-Based Applications
Handling Cache Coherency Issues at Runtime Using Cache Maintenance Operations on Cortex-M7 MCUs Using MPLAB Harmony v3
What is SSC? How to Configure SSC for Audio Applications
What is ICM How to use it for Cryptography
How to Use the XDMAC on Cortex-M7 MCUs to Implement Ping-Pong Buffering in Audi
How to Configure the Memory Protection Unit (MPU) Tech Brief
What is TWI How to Configure the TWI for I2C
ADC Gain and Offset Error Calibration on ARM® Cortex®-
How to Use Differential ADC on Cortex® M7 MCUs TB
What is SleepWalking? How it Helps to Reduce Power Consumption
NAND Flash Interface with EBI on Cortex-M Based MCUs TB
Managing Cache Coherency on Cortex-M7 Based SAM Devices
EEPROM Emulation for Flash-Only Devices Tech Brief


Environmental Information

JEDEC Indicator e3
ROHS Compliant
China EFUP Compliant
Device Weight (g) 0.3683
Shipping Weight (kg) 1.0875
Lead Count 64
Package Type LQFP
Package Width or Size 10x10x1.4mm
Soldering Composition Matte Tin

Alternative Descriptions

Cortex-M7, 300 MHZ, 1MB Flash, 384KB SRAM | Microchip Technology
Mcu, 32Bit, 300Mhz, Lqfp-64 | Newark Electronics
CM7,1024KB FLASH,384KB SRAM,LQFP64 | Avnet America
MCU, 32BIT, 300MHZ, LQFP-64 | Farnell


Frequently Asked Questions

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Is the ATSAME70J20B-AN RoHS compliant?

Yes. This part has been flagged as RoHS Compliant by Microchip Technology.

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