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Details for SN74LV132APWT by Texas Instruments
Semiconductors - ICs > Logic > Gates & Inverters
LOGIC QUAD POS-NAND GATE 14TSSOP
SN74LV132APWT image

SN74LV132APWT by Texas Instruments

LOGIC QUAD POS-NAND GATE 14TSSOP
Features
2-V to 5.5-V VCC Operation
ESD Protection Exceeds JESD 22
Ioff Supports Live Insertion, Partial Power-Down Mode, and Back Drive Protection
Latch-Up Performance Exceeds 250 mA per JESD 17
Max tpd of 9 ns at 5 V
Support Mixed-Mode Voltage Operation on All Ports
Typical VOHV (Output VOH Undershoot) >2.3 V at VCC = 3.3 V, TA = 25u00b0C
Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25u00b0C
Part Information
SN74LV132APWT image
RoHS Compliant
Description
The 'LV132A devices are quadruple positive-NAND gates designed for 2-V to 5.5-V VCC operation. The 'LV132A devices perform the Boolean function Y = A • B or Y = A + B in positive logic. Each circuit functions as a NAND gate, but because of the Schmitt trigger, it has different input threshold levels for positive- and negative-going signals. These circuits are temperature compensated and can be triggered from the slowest of input ramps and still give clean jitter-free output signals.
Specifications
Logic Family / Base Number:
74LV132
Logic Type:
NAND
Output Current:
12mA
No. of Inputs:
2
Supply Voltage Min:
2V
Supply Voltage Max:
5.5V
Logic Case Style:
TSSOP
No. of Pins:
14Pins
Logic IC Family:
74LV
Logic IC Base Number:
74132, 74132
Operating Temperature Min:
-40°C
Operating Temperature Max:
85°C
Product Range:
-
Automotive Qualification Standard:
-
RoHS Phthalates Compliant:
Yes
MSL:
MSL 1 - Unlimited
SVHC:
No SVHC (27-Jun-2018)
Logic Function Number:
74132
Logic IC Function:
Quadruple Positive-NAND Gate with Schmitt-Trigger Inputs
Operating Temperature Range:
-40°C to +85°C
Supply Voltage Range:
2V to 5.5V
Termination Type:
Surface Mount Device
Alternate Descriptions
NAND Gate 4-Element 2-IN CMOS 14-Pin TSSOP T/R Avnet America
NAND Gate 4-Element 2-IN CMOS 14-Pin TSSOP T/R Avnet Europe