MC100LVEP111FAG Clock & Data Distribution by ON Semiconductor

2.5 V / 3.3 V 2:1:10 Differential ECL/PECL/HSTL Clock / Data Fanout Buffer

Status: Active
Series: MC100LVEP111
RoHS: Compliant
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The MC100LVEP111 is a low skew 2:1:10 differential driver, designed with clock distribution in mind, accepting two clock sources into an input multiplexer. The PECL input signals can be either differential or single-ended (if the VBB output is used). HSTL inputs can be used when the LVEP111 is operating under PECL conditions. The LVEP111 specifically guarantees low output-to-output skew.Optimal design, layout, and processing minimize skew within a device and from device to device. To ensure tightest skew, both sides of differential outputs identically terminate into 50 ohms even if only one side is being used. When fewer than all ten pairs are used, identically terminate all the output pairs on the same package side whether used or unused. If no outputs on a single side are used, then leave these outputs open (unterminated). This will maintain minimum output skew. Failure to do this will result in a 10-20 ps loss of skew margin (propagation delay) in the output(s) in use.

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Features

85 ps Typical Device-to-Device Skew
20 ps Typical Output-to-Output Skew
Jitter Less than 1 ps RMS
Additive RMS Phase Jitter: 60fs @156.25MHz, Typical
Maximum Frequency >3 Ghz Typical
VBB Output
430 ps Typical Propagation Delay
The 100 Series Contains Temperature Compensation
PECL and HSTL Mode Operating Range: VCC = 2.375 V to 3.8 V with VEE = 0 V
NECL Mode Operating Range: VCC = 0 V with VEE = -2.375 V to -3.8 V
Open Input Default State
LVDS Input Compatible
Applications
General purpose clock and data distribution for Networking, ATE and Computing

Specifications

Description MC100LVEP111
Compliance Pb-free Halide free
Type Buffer
Channels 1
Input / Output Ratio 2:1:10
Input Level CML ECL HSTL LVDS
Output Level ECL
VCC Typ (V) 2.5 3.3
tJitterRMS Typ (ps) 0.2
tskew(o-o) Max (ps) 25
tpd Typ (ns) 0.43
tR & tF Max (ps) 255
fmaxClock Typ (MHz) 3000
Package Type LQFP-32

Alternative Descriptions

ECL/PECL/HSTL Clock Driver 1:10 LQFP32 | RS
Clock Driver, 3Ghz, Lqfp-32 | Newark Electronics
MC100LVEP111 Series 3 GHz 3.8 V 1:10 Differential ECL/PECL/HSTL Clock Driver | Future Electronics
Clock Driver 2-IN ECL/PECL 32-Pin LQFP Tray | Avnet America
MC100LVEP111FAG, Clock Driver ECL ECL, PECL 2-Input, 32-Pin LQFP | ON Semiconductor MC100LVEP111FAG | RS Americas
IC, SM, LOGIC, ECL, CLOCK GEN | element14


Frequently Asked Questions

Where can I find additional details, specifications and documents for a MC100LVEP111FAG?

Additional datasheets, footprints and schematics for MC100LVEP111FAG are listed on our Part Details page. You can also find images and similar parts to MC100LVEP111FAG on this page.

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What category does MC100LVEP111FAG fall under?

The MC100LVEP111FAG is listed under Timing, Logic & Memory > Clock & Data Distribution > Drivers & Fanout Buffers.

Can I view similar or alternative parts?

You can view similar parts to MC100LVEP111FAG when available in the Drivers & Fanout Buffers range under the specifications section at the bottom of the details page.

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Submit any questions directly to the customer support team of the distributor listing the product. For the MC100LVEP111FAG you can contact the distributor directly for product support, shipping queries etc.

Is the MC100LVEP111FAG RoHS compliant?

Yes. This part has been flagged as RoHS Compliant by ON Semiconductor.

Which authorised distributors for MC100LVEP111FAG have stock available?

Authorised distributors including RS, Newark Electronics, Future Electronics, Avnet America and RS Americas have stock available or on a lead time for MC100LVEP111FAG.

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