MC100E111FNG Clock & Data Distribution by ON Semiconductor

5.0 V ECL 1:9 Differential Clock/Data Fanout Buffer

Status: Active
Series: MC100E111
RoHS: Compliant
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The MC10E/100E111 is a low skew 1-to-9 differential driver, designed with clock distribution in mind. It accepts one signal input, which can be either differential or else single-ended if the VBB output is used. The signal is fanned out to 9 identical differential outputs. An enable input is also provided. A HIGH disables the device by forcing all Q outputs LOW and all Qbar outputs HIGH. The device is specifically designed, modeled and produced with low skew as the key goal. Optimal design and layout serve to minimize gate to gate skew within-device, and empirical modeling is used to determine process control limits that ensure consistent tpd distributions from lot to lot. The net result is a dependable, guaranteed low skew device. To ensure that the tight skew specification is met it is necessary that both sides of the differential output are terminated into 50 , even if only one side is being used. In most applications, all nine differential pairs will be used and therefore terminated. In the case where fewer than nine pairs are used, it is necessary to terminate at least the output pairs on the same package side (i.e. sharing the same VCCO ) as the pair(s) being used on that side, in order to maintain minimum skew. Failure to do this will result in small degradations of propagation delay (on the order of 10-20 ps) of the output(s) being used which, while not being catastrophic to most designs, will mean a loss of skew margin. The VBB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used, decouple VBB and VCC via a 0.01 F capacitor and limit current sourcing or sinking to 0.5 mA. When not used, VBB should be left open. The 100 Series contains temperature

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Features

Guaranteed Skew Spec
Differential Design
VBB Output
PECL Mode Operating Range: VCC = 4.2 V to 5.7 V with VEE = 0 V
NECL Mode Operating Range: VCC = 0 V with VEE = -4.2 V to -5.7 V
Internal Input Pulldown Resistors
ESD Protection: > 3 KV HBM
Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
Moisture Sensitivity Level 1 (For Additional Information, see Application Note AND8003/D)
Flammability Rating: UL-94 code V-0 @ 1/8 inch, Oxygen Index 28 to 34
Transistor Count = 178 devices
Pb-Free Packages are Available

Specifications

Description MC100E111
Compliance Pb-free Halide free
Type Buffer
Channels 1
Input / Output Ratio 1:9
Input Level ECL
Output Level ECL
VCC Typ (V) 5
tJitterRMS Typ (ps) <1
tskew(o-o) Max (ps) 75
tpd Typ (ns) 0.53
tR & tF Max (ps) 650
fmaxClock Typ (MHz) 800
Package Type PLCC-28

Alternative Descriptions

Clock Ic Type:Clock Driver | Newark Electronics
Clock Fanout Buffer 18-OUT 28-Pin PLCC Rail | Avnet America


Frequently Asked Questions

Where can I find additional details, specifications and documents for a MC100E111FNG?

Additional datasheets, footprints and schematics for MC100E111FNG are listed on our Part Details page. You can also find images and similar parts to MC100E111FNG on this page.

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What category does MC100E111FNG fall under?

The MC100E111FNG is listed under Timing, Logic & Memory > Clock & Data Distribution > Drivers & Fanout Buffers.

Can I view similar or alternative parts?

You can view similar parts to MC100E111FNG when available in the Drivers & Fanout Buffers range under the specifications section at the bottom of the details page.

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Is the MC100E111FNG RoHS compliant?

Yes. This part has been flagged as RoHS Compliant by ON Semiconductor.

Which authorised distributors for MC100E111FNG have stock available?

Authorised distributors including Newark Electronics, Avnet America and element14 have stock available or on a lead time for MC100E111FNG.

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