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Details for LMH1982SQE/NOPB by Texas Instruments
Semiconductors - ICs > Clock Timing & Frequency Management > Clock Synthesizers & Generators
LMH1982SQE/NOPB image

LMH1982SQE/NOPB by Texas Instruments

3.3-V and 2.5-V Supplies
External Loop Filter Allows Control of Loop Bandwidth, Jitter Transfer, and Lock Time Characteristics
Free Run or Holdover Operation on Loss of Reference
I2 C Interface and Control Registers
Low-Jitter Output Clocks May Be Directly Connected to an FPGA Serializer to Meet SMPTE SDI Jitter Specifications
Supports Cross-Locking of Input and Output Timing
Top of Frame (TOF) Pulse with Programmable Output Format Timing and Hi-Z Capability
Two Simultaneous LVDS Output Clocks with Selectable Frequencies and Hi-Z Capability: u2013 SD Clock: 27 MHz or 67.5 MHz u2013 HD Clock: 74.25 MHz, 74.25/1.001 MHz, 148.5 MHz or 148.5/1.001 MHz
Two reference ports (A and B) With H and V Sync Inputs
User-Defined Free Run Control Voltage Input
Part Information
LMH1982SQE/NOPB image
RoHS Compliant
The LMH1982 device is a multi-rate video clock generator ideal for use in a wide range of 3-Gbps (3G), high-definition (HD), and standard-definition (SD) video applications, such as video synchronization, serial digital interface (SDI) serializer and deserializer (SerDes), video conversion, video editing, and other broadcast and professional video systems. The LMH1982 can generate two simultaneous SD and HD clocks and a Top of Frame (TOF) pulse. In genlock mode, the device's phase locked loops (PLLs) can synchronize the output signals to H sync and V sync input signals applied to either of the reference ports. The input reference can have analog timing from Texas Instrument's LMH1981 multi-format video sync separator or digital timing from an SDI deserializer and should conform to the major SD and HD standards. When a loss of reference occurs, the device can default to free run operation where the output timing accuracy will be determined by the external bias on the free run control voltage input. The LMH1982 can replace discrete PLLs and fieldprogrammable gate array (FPGA) PLLs with multiple voltage controlled crystal oscillators (VCXOs). Only one 27.0000 MHz VCXO and loop filter are externally required for genlock mode. The external loop filter as well as programmable PLL parameters can provide narrow loop bandwidths to minimize jitter transfer. HD clock output jitter as low as 40 ps peak-to-peak can help designers using FPGA SerDes meet stringent SDI output jitter specifications. The LMH1982 is offered in a space-saving 5 mm x 5 mm 32-pin WQFN package and provides low total power consumption of about 250 mW (typical).
Clock IC Type:
Clock Generator
No. of Outputs:
Supply Voltage Min:
Supply Voltage Max:
Clock IC Case Style:
No. of Pins:
Operating Temperature Min:
Operating Temperature Max:
Product Range:
Automotive Qualification Standard:
RoHS Phthalates Compliant:
MSL 1 - Unlimited
No SVHC (27-Jun-2018)
Alternate Descriptions
Texas Instruments,LMH1982SQE/NOPB,Clock RS Components
Clock Generator 32-Pin LLP EP T/R Avnet America
Clock Generator 32-Pin LLP EP T/R Avnet Europe