DSPIC33CK32MP206T-I/MR More Semiconductors - ICs by Microchip Technology

100 MHz Single-Core 16-bit DSC

Status: Active
Series: dsPIC33CK32MP206
RoHS: Compliant
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Microchip’s dsPIC33CK family of digital signal controllers (DSCs) features a single 100 MIPS 16-bit dsPIC® DSC core with integrated DSP and enhanced on-chip peripherals. These DSCs enable the design of high-performance, precision motor control systems that are more energy efficient, quieter in operation and provide extended motor life. They can be used to control BLDC, PMSM, ACIM, SR and stepper motors. These DSCs are also ideal for switched mode power supplies such as AC/DC, DC/DC, UPS and PFC, providing high-precision digital control of Buck, Boost, Fly-Back, Half-Bridge, Full-Bridge, LLC and other power circuits to reach the highest possible energy efficiency.  These devices are also ideal for high-performance general-purpose and robust applications.

The dsPIC33CK product family has many features that help simplify functional safety certifications for ASIL-B and ASIL-C focused applications including: 
• Functional Safety Manual, FMEDA and Diagnostic Software available under NDA upon request to your local sales office
• Learn more about 16-bit Functional Safety capabilities including hardware, software, and supporting collateral

 

Prices starting from US$2.48


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Logo for Newark Electronics Newark Electronics US$2.91
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Features

Operating Conditions
3.0V to 3.6V, -40ºC to +150ºC, DC to 100 MIPS
dsPIC33CK DSC Core
Up to 256 KBytes of Program Flash with ECC and Live Update (dual-partition Flash)
Up to 24 KBytes of Data SRAM with Memory Built in Self-Test (MBIST)
Modified Harvard architecture with 16-bit data and 24-bit instructions
Code efficient (C and Assembly) CPU architecture designed for real-time applications
16 16-bit working registers
4 sets of interrupt context saving registers, including ACC and CPU status for fast interrupt handling
Single-cycle, mixed-sign 32-bit MUL
Fast 6-cycle hardware 32/16 and 16/16 DIV
Dual 40-bit fixed point Accumulators (ACC) for DSP operations
Single-cycle MAC/MPY with dual data fetch and result write-back
Zero overhead looping support
High-Speed PWM Module
8 independent PWM pairs (16 total outputs) with up to 250ps resolution
Dead-time insertion for rising and falling edges and dead-time compensation support
Clock chopping for high-frequency operation
Fault and current limit inputs
Flexible trigger configuration for ADC triggering
Advanced Analog Features
3 12-bit 3.5 MSPS ADC Modules each with 2 dedicated SARs and 1 shared SAR cores (3 S&Hs)
12, 16, 19, 20 or 24 ADC input channels (depending on package)
4 digital comparators for reducing CPU overhead
4 oversampling filers up to 256x for increased resolution (up to 16-bits)
3 analog comparators (15ns) with dedicated 12-bit DACs with hardware slope compensation
Up to 3 op amps with internal connection to ADC Module
Timer/Counters/Output Compare/Input Capture
10 16-bit timer/counters (up to 4 32-bit)
14 PWM or Output Compare (OC) outputs
9 Input Captures (IC) pins or internal connections from the CLC or Comparator Modules
Peripheral Trigger Generator (PTG) for scheduling complex sequences
2 Quadrature Encoder Interface (QEI) Modules for optical encoder support
Communication Interfaces
3 UARTs (15 Mbps) with automated protocol handling for LIN/J2602, DMX and IrDA®
3 4-wire SPI/I2S up to 40 MHz with dedicated pins
3 I2C Modules (up to 1 Mbps) with SMBus support
2 Single-Edge Nibble Transmission (SENT) Modules for sensor interfacing
4 DMA channels supporting UART, SPI, ADC, IC, OC and Timer data transfers
Special Features
4 Configurable Logic Cell (CLC) Modules with user defined logic gate circuits
Programmable Pin Select (PPS) for peripheral pin function mapping
Parallel Master Port (PMP) for external data expansion
On-chip temperature sensor with direct ADC Module connection
Clock and Power Management
On-chip 8 MHz Fast RC (FRC) and 32 kHz Low-Power RC (LPRC) oscillators
Programmable PLLs with external oscillator clock sources and Reference Clock Output (REFO)
Fail-Safe Clock Monitor (FSCM) with 8 MHz Back-up Fast RC (BFRC) oscillator
Low-Power management modes - Sleep, Idle and Doze
Integrated Power-on Reset (POR) and Brown-Out Reset (BOR)
Debugger Development Support
In-Circuit and in application programming and debug support (ICSP)
On-chip debug trace buffer and run-time watch with 3 complex and 5 simple breakpoints
IEEE 1149.2 (JTAG) boundary scan support
Safety Features
Dead-Man Timer (DMT) safety feature clocked by instruction fetches
Watch Dog Timer (WDT)
CodeGuard™ security for program FLASH
Programmable Cyclic Redundancy Check (CRC)
FLASH ECC Fault Injection testing feature
ICSP™ write inhibit
Class B Safety Library, IEC 60730
Functional Safety support (ISO26262)
ASIL-B & ASIL-C focused applications
FMEDA, Diagnostic Software and Functional Safety manual available under NDA upon request to your sales office
Functional Safety hardware features
Multiple redundant clock sources
I/O Port read-back
Analog peripherals redundancies
Windowed Watchdog Timer
RAM BIST
Hardware traps
SFR locks
Write protection
Shadow working registers

Specifications

Architecture 16
MaxSpeed (MHz) 100
CPU Speed (MIPS/DMIPS) 100
Program Memory Size (KB) 32
Multiple Flash Panels True
Direct Memory Access (DMA) Channels 4
Temp. Range Min. -40
Temp. Range Max. 150
Operation Voltage Min.(V) 3
Operation Voltage Max.(V) 3.6
Pin Count 64
Low Power No
Number of Comparators 3
Number of ADCs 3
ADC Channels 20
Max ADC Resolution (bits) 12
Max ADC Sampling Rate (ksps) 3500
Number of DACs 3
DAC outputs 1
Max DAC Resolution (bits) 12
Hardware RTCC No
Motor Control PWM Channels 16
SMPS PWM Channels 16
Number of PWM Time Bases 17
Output Compare Channels 14
USB Interface None
Number of CAN Modules 0
Type of CAN module None
Crypto Engine No
Quadrature Encoder Interface (QEI) 2
Segment LCD 0
LCD/Graphics Interface No
Configurable Logic Cell Modules (CLC /CCL) 4
Peripheral Pin Select (PPS)/Pin Muxing Yes
Supported in MPLAB Code Configurator Yes
Pins | Packaging 64 | QFN
Temp Range -40C to +85C
Packing Media Tape and reel (3300)

Resources



Application Notes
AN908 - Using the dsPIC30F / dsPIC33F for Vector Control of an ACIM
AN984 - An Introduction to AC Induction Motor Control
AN1017 - Sinusoidal Control of PMSM Motors with dsPIC30F / dsPIC33F/ dsPIC33E DSC
AN3399 - Safeguarding Flash Memory Self-Write Operations
AN1078 - Dual-Shunt FOC With SMO
AN1106 - AN1106, Power Factor Correction in Power Conversion Applications
AN1114 - Switch Mode Power Supply (SMPS) Topologies (Part I)
AN1162 - Sensorless Field Oriented Control (FOC) of an AC Induction Motor (ACIM)
AN1208 - Dual-Shunt FOC With PLL and PFC
AN1206 - Sensorless Field Oriented Control (FOC) of an AC Induction Motor (ACIM) Using Field Weakening
AN1207 - Switch Mode Power Supply (SMPS) Topologies (Part II)
AN1279 - Offline UPS Reference Design Using the dsPIC DSC
AN1278 - Digital Power IPFC Reference Design Application Note
AN1292 - Dual-Shunt FOC with PLL
AN1299 - Single-Shunt Three-Phase Current Reconstruction Algorithm for Sensorless FOC of a PMSM
AN1279 - Addendum - Offline UPS Reference Design Using the dsPIC DSC
AN1338 - Grid-Connected Solar Microinverter Ref. Design Using a dsPIC® DSC
AN1336 - DC/DC LLC Reference Design Using the dsPIC® DSC - DC/DC LLC Reference Design Using the dsPIC® DSC
AN1335 - Phase-Shifted Full-Bridge (PSFB) Quarter Brick DC/DC Converter
AN1292 Source Code for MCLV-2 and MCHV-2 using dsPIC33CK256MP508





Reference Manuals
Functional Safety Manual and FMEDA Access for dsPIC33C Family
dsPIC33/PIC24 FRM, 32-Bit Programmable CRC
dsPIC33E/PIC24E FRM, Introduction
dsPIC33E/PIC24E FRM, Data Memory
dsPIC33/PIC24 FRM, dsPIC33E/PIC24 Program Memory
dsPIC33/PIC24 FRM, Flash Programming
dsPIC33/PIC24 FRM, Interrupts
dsPIC33E/PIC24E FRM, Reset
dsPIC33E/PIC24E FRM, Watchdog Timer and Power-Saving Modes
dsPIC33/PIC24 FRM, Quadrature Encoder Interface (QEI)
dsPIC33E/PIC24E FRM, Programming and Diagnostics
dsPIC33/PIC24 FRM, Peripheral Trigger Generator (PTG)
dsPIC33/PIC24 FRM, Direct Memory Access Controller (DMA) - PIC24F FRM
dsPIC33/PIC24 FRM, Configurable Logic Cell (CLC)
dsPIC33/PIC24 FRM, Capture/Compare/PWM/Timer (MCCP and SCCP)
dsPIC33/PIC24 FRM, I2C
dsPIC33/PIC24 FRM, Serial Peripheral Interface (SPI) with Audio Codec Support
dsPIC33/PIC24 FRM, Single-Edge Nibble Transmission (SENT)
dsPIC33/PIC24 FRM, CodeGuard Intermediate Security
dsPIC33/PIC24 FRM, Deadman Timer (DMT)
dsPIC33/PIC24 FRM, 12-Bit High-Speed, Multiple SARs A/D Converter (ADC)
dsPIC33/PIC24 FRM, Dual Partition Flash Program Memory
dsPIC33/PIC24 FRM, Enhanced CPU
dsPIC33/PIC24 FRM, Current Bias Generator (CBG)
dsPIC33/PIC24 FRM, High-Resolution PWM with Fine Edge Placement
dsPIC33/PIC24 FRM, IO Ports with Edge Detect
dsPIC33/PIC24 FRM, Oscillator Module with High-Speed PLL
dsPIC33/PIC24 FRM, Multiprotocol Universal Asynchronous Receiver Transmitter (UART)
dsPIC33/PIC24 FRM, Dual Watchdog Timer
dsPIC33C/PIC24 FRM, High-Speed Analog Comparator with Slope Compensation DAC
dsPIC33/PIC24 FRM, Timer1 Module
dsPIC33/PIC24 FRM, Parallel Master Port (PMP)



Environmental Information

JEDEC Indicator e3
ROHS Compliant
China EFUP Compliant
Device Weight (g) 0.2324
Shipping Weight (kg) 0.370303
Lead Count 64
Package Type QFN
Package Width or Size 9x9x0.9mm
Soldering Composition Matte Tin

Alternative Descriptions

Dsc, 100Mhz, 32Kb, Qfn-Ep-64 | Newark Electronics
MCU 16-Bit dsPIC DSC Modified Harvard Architecture 32KB Flash 3V to 3.6V 64-Pin QFN T/R | Avnet America
dsPIC33C 100MHz, 32K Dual Panel Flash, 8K RAM, OpAmps, 12bit ADCs, PWM | Microchip Technology
DSC, 100MHZ, 32KB, QFN-EP-64 | Farnell


Frequently Asked Questions

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Yes. This part has been flagged as RoHS Compliant by Microchip Technology.

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