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Details for Texas Instruments


Low Jitter, 2-Input Selectable 1:16 Universal-to-LVPECL Buffer
Buy Directly from Texas Instruments (3181 in Stock)
$9.7800 per unit
Series Information for CDCLVP1216RGZT - Texas Instruments


  • feature
    16 LVPECL Outputs
  • feature
    2.375-V to 3.6-V Device Power Supply
  • feature
    2:16 Differential Buffer
  • feature
    Available in 7-mm u00d7 7-mm VQFN-48 (RGZ)
  • feature
    ESD Protection Exceeds 2000 V (HBM)
  • feature
    Industrial Temperature Range: u201340u00b0C to +85u00b0C
  • feature
    LVPECL Reference Voltage, VAC_REF, Available for Capacitive-Coupled Inputs
  • feature
    Maximum Clock Frequency: 2 GHz
  • feature
    Maximum Core Current Consumption: 110 mA
  • feature
    Maximum Output Skew: 30 ps
  • feature
    Maximum Propagation Delay: 550 ps
  • feature
    Selectable Clock Inputs Through Control Pin
  • feature
    Supports 105u00b0C PCB Temperature (Measured with a Thermal Pad)
  • feature
    Universal Inputs Accept LVPECL, LVDS, and LVCMOS/LVTTL
  • feature
    Very Low Additive Jitter: <100 fs, RMS in 10-kHz to 20-MHz Offset Range: u2013 57 fs, RMS (Typical) at 122.88 MHz u2013 48 fs, RMS (Typical) at 156.25 MHz u2013 30 fs, RMS (Typical) at 312.5 MHz


The CDCLVP1216 is a highly versatile, low additive jitter buffer that can generate 16 copies of LVPECL clock outputs from one of two selectable LVPECL, LVDS, or LVCMOS inputs for a variety of communication applications. It has a maximum clock frequency up to 2 GHz. The CDCLVP1216 features an on-chip multiplexer (MUX) for selecting one of two inputs that can be easily configured solely through a control pin. The overall additive jitter performance is less than 0.1 ps, RMS from 10 kHz to 20 MHz, and overall output skew is as low as 30 ps, making the device a perfect choice for use in demanding applications. The CDCLVP1216 clock buffer distributes one of two selectable clock inputs (IN0, IN1) to 16 pairs of differential LVPECL clock outputs (OUT0, OUT15) with minimum skew for clock distribution. The CDCLVP1216 can accept two clock sources into an input multiplexer. The inputs can be LVPECL, LVDS, or LVCMOS/LVTTL. The CDCLVP1216 is specifically designed for driving 50-Ω transmission lines. When driving the inputs in single-ended mode, the LVPECL bias voltage (VAC_REF) should be applied to the unused negative input pin. However, for high-speed performance up to 2 GHz, differential mode is strongly recommended. The CDCLVP1216 is packaged in a small 48-pin, 7-mm x 7-mm VQFN package and is characterized for operation from –40°C to +85°C.


Clock IC Type:
Clock Buffer
No. of Outputs:
Supply Voltage Min:
Supply Voltage Max:
Clock IC Case Style:
No. of Pins:
Operating Temperature Min:

Alternate Descriptions

Avnet America

Clock Driver 2-IN LVPECL 48-Pin VQFN EP T/R

Avnet America product

Avnet Europe

Clock Driver 2-IN LVPECL 48-Pin VQFN EP T/R

Avnet Europe product

Texas Instruments

Low Jitter, 2-Input Selectable 1:16 Universal-to-LVPECL Buffer

Texas Instruments product