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Details for AD9888KSZ-140 by Analog Devices
Electronic & Electrical Components > Semiconductors - ICs > Driver & Interface ICs
INTERFACE GRAPHICS UXGA HDTV SMD
AD9888KSZ-140 image

AD9888KSZ-140 by Analog Devices

INTERFACE GRAPHICS UXGA HDTV SMD
Features
170 MSPS maximum conversion rate 500 MHz programmable analog bandwidth 0.5 V to 1.0 V analog input range Less than 450 ps p-p PLL clock jitter at 170 MSPS 3.3 V power supply Full sync processing Sync detect for hot plugging 2:1 analog input mux 4:2:2 output format mode Midscale clamping Power-down mode Low power: <1 W typical at 170 MSPS
Part Information
AD9888KSZ-140 image
RoHS Compliant
Description
The AD9888 is a complete 8-bit, 170 MSPS, monolithic analog interface optimized for capturing RGB graphics signals from personal computers and workstations. Its 170 MSPS encode rate capability and full-power analog bandwidth of 500 MHz supports resolutions of up to 1600 × 1200 (UXGA) at 75 Hz. For ease of design and to minimize cost, the AD9888 is a fully integrated interface solution for flat panel displays. The AD9888 includes an analog interface that has a 170 MHz triple ADC with an internal 1.25 V reference phase-locked loop (PLL) to generate a pixel clock from HSYNC and COAST; midscale clamping; and programmable gain, offset, and clamp controls. The user provides only a 3.3 V power supply, analog input, and HSYNC and COAST signals. Three-state CMOS outputs can be powered from 2.5 V to 3.3 V. The on-chip PLL of the AD9888 generates a pixel clock from the HSYNC and COAST inputs. Pixel clock output frequencies range from 10 MHz to 170 MHz. PLL clock jitter is typically less than 450 ps p-p at 170 MSPS. When the COAST signal is presented, the PLL maintains its output frequency in the absence of HSYNC. A sampling phase adjustment is provided. Data, HSYNC, and clock output phase relationships are maintained. The PLL can be disabled, and an external clock input can be provided as the pixel clock. The AD9888 also offers full sync processing for composite sync and sync-on-green applications. A CLAMP signal is generated internally or can be provided by the user through the CLAMP input pin. This device is fully program- mable via a 2-wire serial port. Fabricated in an advanced CMOS process, the AD9888 is provided in a space-saving, 128-lead, MQFP, surface-mount, plastic package and is specified over the 0°C to 70°C temperature range. The AD9888 is also available in a Pb-free package.
Specifications
IC Interface Type:
2 Wire Serial
Supply Voltage Min:
3V
Supply Voltage Max:
3.6V
Interface Case Style:
MQFP
No. of Pins:
128Pins
Operating Temperature Min:
0°C
Operating Temperature Max:
70°C
Product Range:
-
Automotive Qualification Standard:
-
RoHS Phthalates Compliant:
Yes
MSL:
MSL 3 - 168 hours
SVHC:
No SVHC (07-Jul-2017)
Bandwidth:
500MHz
Base Number:
9888
Operating Temperature Range:
0°C to +70°C
Power Dissipation Pd:
850mW
Resolution (Bits):
8bit
Supply Current:
200mA
Supply Voltage Range:
3V to 3.6V 2.2V to 3.6V
Termination Type:
Surface Mount Device
Alternate Descriptions
ADC 140Msps 8-bit Parallel 128-Pin MQFP RS Components