Microchip reguarly refresh their eight-bit portfolio by introducing new core-independent peripherals that provide advanced functionality. With the CLB, or Configurable Logic Block, Microchip continues their FPGA/Microcontroller fusion experiments, which began with the CLC.

As of this writing, Microchip intends to provide this technology in various form factors. The table in Figure 1 was taken from the datasheet and provides an overview of the currently available products. Developers, however, are advised to expect more microcontrollers with CLB shortly.

Recapitulation of History to Understand Functionality

Microchip's CLC unit was the first introduction of an FPGA eight bit - hybrid. The groundbreaking internal structure is outlined in the figure.

The left-hand side of the diagram shows the input islands, which can be gated to provide custom input combinations. This information is then forwarded into the actual logic block, which is responsible for performing the computations required. Finally, the output can be passed on to peripheral devices or an IO pin, thereby permitting the elimination of glue logic by integrating it into the microcontroller.

The CLB takes this architecture and expands it, as shown in the figure.

The most important new feature is a unit commonly known as a basic logic element, or BLE for short. A BLE is an FPGA-like unit that can perform various functions commonly found in digital logic circuits.

The current version of the CLB provides 32 of these BLE units, which can be arranged inside the MCU using a graphical layout software not dissimilar to the one used for schematic entry in some FPGAs.

Of course, Microchip also provides the various core-independent peripheral integrations known from the CLC; furthermore, two 32-bit software registers permit programmatic interaction with the logic found in the CLB. Finally, an important sales factor of the CLB is its independence from the core clock. When configured correctly, jobs outsourced to the CLB can be run as the compute core of the microcontroller is hibernated.

Performing Practical Smoke Tests with the CLB

Microchip's excellent development tool environment recently received an upgrade in the form of the ICD5 and PicKit5 - they are discussed in more detail in the video found at https://www.youtube.com/watch?v=yrM78fs-AR8. Microchip also provides compatibility with previous generations as long as the current version of MPLAB is used: the following experiments will take place using version 6.20 running on a Windows 10 workstation.

After creating a new project for the target MCU and opening the MCC configuration environment, the CLB synthesizer presents itself as shown in the figure.

Microchip furthermore provides an easy-to-use sample called "inverting a signal". Activating it yields the results shown in the figure.

The Synthesize button in the bottom left-hand corner of this screen is of paramount importance. Clicking it starts the synthesis process, which returns the bitstream to be used. It also informs you of the number of BLE units required by the currently configured design.

After saving and closing the window, the CLB peripheral devices are shown in the grid view. This can then be used to assign physical pins to the individual elements.

Once the hardware configuration is completed successfully, code can be generated using the MCC generator's 'Generate' command. Microchip's integration between MCC and the CLB build is considered a standard for the industry. 

The file clbBitstream.s then contains the actual bitstream; the structure presents itself as shown in the figure.

System or CLB configuration is handled at runtime via the method CLB1_Configure, which acts as a catch-all function for peripheral initialization:

void CLB1_Configure(uint16_t start_address)
{

 uint16_t end_address;

 end_address = start_address + 102;

 // Set the bitstream address
 CRC_SetScannerAddressLimit(start_address, end_address);

 // Start CLB bitstream load
 CRC_StartNvmScanner();

 // Wait to complete
 while (CRC_IsScannerBusy());

 // Switch back to the CRC peripheral
 CRC_StopNvmScanner();
}

The initialisation occurs by writing various values into key registers. The file clb1.c furthermore provides various methods for reading and writing the software control registers. As an example, method CLB1_SWIN_Read8 reads an eight-bit word from the register:

void CLB1_Configure(uint16_t start_address)
uint8_t CLB1_SWIN_Read8(void)
{
 uint8_t result = 0x00;

 result = (uint8_t)CLBSWINL;

return result;
}

Evaluating the Propagation Delay of CLB-hosted Logic

Next, the microcontroller is initialized. No schematics are required, and power can be supplied to the board under test via the PicKit, as shown in the future.

Input stimulus will then be provided using a Tektronix AWG2021. With the default clock rate of 1 MHz and the input synchronizer set to synchronised input, an output similar to the one shown in the figure can be seen.

In the next step, the instruction clock rate of the eight-bit compute core is increased to its maximum rate. On the oscilloscope, we see a significant improvement in the (already fast) response time, as shown in the figure.

For the highest performance, IO logic can be decoupled from the eight-bit core's main clock. Opening synchronization requires a return to the MCC code generator, where the input options are to be reconfigured.

After that, a last run against the stimulus can be performed. It will show the results shown in the final figure; the response shows that the clock is now almost completely free of skew.

Additional documentation

Microchip accompanies the newly introduced core-independent peripheral with a variety of examples. The seven-segment decoder found at https://github.com/microchip-pic-avr-examples/pic16f13145-7-segment-decoder-mplab-mcc shows both classic gate synthesis and the use of LUT's for bitstream generation.

Furthermore, the documentation found at https://onlinedocs.microchip.com/oxy/GUID-6054136A-5DF1-4573-908F-EDF0A7D9E067-en-US-1/GUID-A838B6F7-9A78-40D5-9E96-3404F3A6E032.html#GUID-A838B6F7-9A78-40D5-9E96-3404F3A6E032 provides finished examples including one intended for driving NeoPixel smart LEDs.

Conclusion

With the PIC16F13145 and its CLB peripheral, Microchip shows that eight-bit microcontrollers remain a highly versatile and in-demand element of the electronics landscape.

Using the CLB permits the elimination of glue logic, thereby greatly reducing both BoM complexity and component costs. If an eight-bit application is developed, the CLB should definitely be considered in all cases.